Exploring Shape and Margin in Analog Computing Circuits: A Machine Learning-Based Approach to Design and Performance Evaluation

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Abstract

This research focuses on the design and analysis of shape-based analog computing (S-AC) circuits utilizing the margin-propagation method. It examines the fundamental characteristics of S-AC circuits, particularly their scalability in terms of precision, speed, and power efficiency when compared to digital alternatives. The development of S-AC circuits integrates machine learning (ML) architectures with mathematical functions, and their input-output characteristics are modeled using a CMOS process for circuit simulations. A key advantage of S-AC-based neural networks is their robustness against temperature variations, ensuring consistent accuracy. Additionally, as the accuracy of the fundamental S-AC process improves with multiple splines, scalability remains unaffected. This paper also highlights the significance of Design Margin and Shape Analysis, where the design parameter SSS and ML-based techniques are critical in shaping the system's ability to replicate the desired functional form. Unlike conventional design approaches, S-AC design provides flexibility by allowing users to define the proto-shape based on application-specific requirements, prioritizing the achievement of precise functional forms.

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